The proposal, entitled "Material Development Strategy Toward Innovations in Semiconductor Devices: Utilization of Two-Dimensional Materials as Semiconductor Channels", is a research and development strategy designed to develop fundamental technologies required to use two-dimensional materials, such as the evaluation of interfacial characteristics with different types of materials, thin film formation of two-dimensional materials at wafer-scale, device structure production and integration, in preparation for the next generation of semiconductors in which transistor channel materials and manufacturing processes will dramatically change at the level of 1 nm and below. In order to achieve higher performance and lower power consumption of semiconductor integrated circuits, innovations in transistor channel materials, which are the basic component of such circuits, as well as device structures are required in addition to miniaturization. For this reason, we focus our attention on two-dimensional materials that can form ultrathin channels of 5 nm or less and propose the promotion of research and development topics on fundamental technologies such as thin film formation technology of two-dimensional materials at wafer-scale, and evaluation technologies, where Japanese companies can leverage their strengths. To promote such research and development, we also propose measures for enhancing research and development programs, including funding programs that help develop shared facilities where material and device researchers can collaborate closely, thin film formation of two-dimensional materials at wafer-scale can be produced with two-dimensional materials, and semiconductor device structures can be prototyped and evaluated for their characteristics and also help link industrial strategies to research and development strategies.

Semiconductor integrated circuits, which are important fundamental technologies that support the digitization of the society, are now expected to continue to achieve improved performance and lower power consumption based on miniaturization and enhanced integration in order to meet requirements such as higher speed and lower power consumption in computer operations and AI processing, higher speed, larger capacity and smaller delay in communications as well as higher sensitivity and lower power consumption in IoT. On the other hand, miniaturization technologies have already reached the level of 10 nm, which is very close to the limit of planar miniaturization, and it is becoming more difficult to improve performance based on the conventional two-dimensional miniaturization and enhanced integration. To overcome such an issue, it is necessary to reduce the effective occupied area in wafers and chips by changing the structure of transistors, which are the basic component of circuits, from two-dimensional to three-dimensional. Lamination of transistor channels and vertical stacking of type-p and type-n transistors are believed to be important. The recent trend is the promotion of research and development of transistors in the Gate-All-Around (GAA) structure, using nanosheet channels made of silicon (Si) or silicon-germanium (SiGe). In a further generation, the use of two-dimensional materials made with ultrathin nanosheets (5 nm or less), two-dimensional substances (e.g., transition metal dichalcogenide: TMDC) and multiple one-dimensional substances arranged in two dimensions (e.g., carbon nanotube: CNT) is expected to appear and research and development designed to examine such possibilities are increasing worldwide.

On the other hand, what has been recognized strongly in the midst of the recent US-China technology hegemony struggle and a global shortage of semiconductors is the importance of securing a semiconductor supply chain and retaining semiconductor production facilities and production capabilities in one's own country in terms of economic security. While Japan is internationally in an advantageous position for its materials industry, and process and measurement equipment industries, the country does not have production technologies or production facilities for advanced high-performance semiconductor logics of the 40-nm generation or later. In the future, it will become important for computer, telecommunication, IoT, automobile and other industries to retain cutting-edge semiconductor technologies domestically. Currently, however, the Japanese domestic industry is in a rather difficult situation in its semiconductor business and largely behind its counterparts in Taiwan, Korea and other leading countries in terms of the research and development of advanced logic semiconductors to which two-dimensional materials are strongly expected to be introduced. Since the generation in which channel materials and manufacturing processes change dramatically can also be seen as a great opportunity for the resurgence of the Japanese advanced semiconductor technology and industry, it is important for Japan to develop a successful research and development strategy on science and technology that is related to the use of transistor channels based on two-dimensional materials.

The academic research on two-dimensional materials conducted in Japan includes "Science of Atomic Layers" (2013-2017), a new academic field in Grants-in-Aid for Scientific Research (KAKENHI), and "Development of Atomic or Molecular Two-Dimensional Functional Films and Creation of Fundamental Technologies for Their Applications" (2014-2021), a JST CREST research. This research covered investigation from the characteristics and functionality of two-dimensional substances to device structure production, accumulated knowledge in thin film formation and characteristic control of two-dimensional materials, and identified issues on device development. Recently, Grant-in-Aid for Transformative Research Areas (A) "Science of 2.5 Dimensional Materials: Paradigm Shift of Materials Science Toward Future Social Innovation" (2021-2025) has been launched to research new physical properties, functions and other aspects of laminated two-dimensional substances. In coming years, it will be necessary to strategically promote, from a long-term perspective, the research and development of fundamental technologies such as thin film formation technology of two-dimensional materials, evaluation technology for interfacial characteristics, interfacial control technology and higher mobility technology in order to apply them to highly functional devices, new functional devices and integrated circuits.

The research and development issues that should be examined in the future include the identification and modeling of interfacial physical properties and functions of two-dimensional materials, high-quality thin film formation of two-dimensional materials at wafer-scale as well as device production and integration, which require various fundamental technologies as shown below.

• (1) Identification and modeling of interfacial physical properties and functions of two-dimensional materials
  

  Although the physical properties of two-dimensional substances such as graphene and TMDC, multiple one-dimensional substances arranged in two-dimensions such as CNT, and ultrathin silicon of 5 nm or less have been mainly studied in fundamental research on two-dimensional materials for semiconductors, their physical properties and functions including the heterointerfaces with insulators, metals and other substances are not fully understood yet. For this reason, it is necessary to research and develop analytical and evaluation methods that can evaluate the physical, chemical, stress, electrical and other characteristics of hetero-interfaces between two-dimensional materials and other materials at the nanoscale and also develop models and theories that help understand the obtained measurement results. It is important to research and develop methods for forming highly functional, high-quality hetero-interfaces, based on these findings. It is also desirable to investigate new compositions of ultrathin films of 5 nm or less with high mobility and two-dimensional materials in crystal structure.

• (2) High-quality film formation at wafer-scale

  In order to use two-dimensional materials in fine transistor channels to produce an integrated circuit for logics or other purposes, it is essential to use a technology for making a high-quality two-dimensional material into films and a substrate that has a large area in which the high-quality two-dimensional material has been made into films for device production. In addition to a method for producing films on silicon substrates, based on chemical vapor deposition (CVD) technology or spatter technology, film formation technology also requires the research and development of an atomic layer deposition (ALD) method that enables control at the atomic layer level and a selective growth technology that makes a two-dimensional material into films only on specific material surfaces. Films must be formed on silicon substrates 200 or 300 mm in diameter to use currently available process devices. Therefore, it is important to research and develop a film thickness control at the atomic layer level and a crystal growth technology that can make the single crystal area as large as possible. It is also important to research and develop a method for transferring a high-quality crystal layer of two-dimensional materials produced on another substrate onto a silicon substrate, while controlling the surface orientation.

• (3) Device structure production and integration

  The production of a device that is difficult to produce with conventional silicon technology, such as a transistor with an ultra-thin high-mobility channel, an optical device, terahertz (THz) oscillation device or sensor with molecular-level sensitivity, requires not only film formation technology and substrate technology for the two-dimensional material, but also the research and development of process technologies such as doping for type-p and type-n semiconductor conductivity control (pn control), low-resistant ohmic contact formation, etching and insulating film deposition as well as a gate stack technology that controls transistor thresholds. Especially to achieve high mobility, it is important to develop an atomic layer etching (ALE) technology that can process a two-dimensional material with the accuracy at the atomic layer level and a low-temperature, low-energy-beam deposition technology for insulating films and metal films that do not damage the two-dimensional material. It is also necessary to prototype new device structures and verify their performance and functionality for transistors with an ultra-thin high-mobility channel, optical devices, terahertz (THz) oscillation devices and sensors with molecular-level sensitivity that are difficult to produce with conventional silicon technology. Moreover, it is essential to research and develop a device simulation technology that models characteristics specific to two-dimensional materials and characteristics of their hetero-interfaces in order to promote high-performance design and integration of devices.

The efficient promotion of the above research and development efforts will need the establishment of research and development programs suitable for the current situation in Japan. In addition to leveraging the knowledge obtained in past efforts and projects on two-dimensional materials to the maximum level, we also should promote coordination among different research fields such as material science, theoretical science, process science, data science, device physics and simulation, the development of shared facilities where substrates can be produced with two-dimensional materials and devices can be prototyped and evaluated, funding enhancement at various levels that support such research and development activities (in fundamental research, research and development center formation, device prototyping and its practical applications) as well as coordination among different projects ranging from the fundamental research to applied research. It is also desirable to develop a new community for device research using two-dimensional materials in academy activities and promote collaboration between the academia and industry in device development projects. Furthermore, it is important to leverage Japan's technological strengths in materials, crystal growth/formation and devices to acquire the knowledge and technology of advanced semiconductor integration processes through enhanced collaboration with research institutions in friendly overseas nations that have strengths in process technology and integration technology. Particularly interaction with young human resources in overseas organizations is expected to develop and train young semiconductor experts in Japan, with knowledge and skills ranging from materials to devices and processes.