Progress Report
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Development of Integration Technologies for Superconducting Quantum Circuits[2] Research and development of qubit-integrated hardware systems
Progress until FY2025
1. Overview
In the typical setup of today's superconducting qubit circuits, qubit chips placed at cryogenic temperatures and microwave electronics operating at room temperature are connected by using one or more coaxial cables per qubit. However, this method cannot scale up to tens of thousands of qubits or more due to the limitations of space and cooling power of the dilution refrigerator. To solve this problem, this R&D theme aims to develop hardware technologies around quantum chips, such as a high-capacity dilution refrigerator with high cooling capacity and connector-less high-density wiring, to break through the wiring bottleneck for integration.
The key in this development is how to control and do signal processing in the vicinity of quantum bits to reduce wiring between different temperature stages. Therefore, we are developing a "vertical integration" quantum bit module, in which the signal processing circuit that controls and reads out the quantum bits and the quantum bits are separated in different chips and connected by bump bonding. For the dilution refrigerator, we have manufactured the dilution refrigerator, which is used for a fully Japan-made quantum computer to test the component technologies developed in the project.
2. Outcome so far
① Development of Vertically Integrated Mounting Structure
We are conducting design, prototyping, and evaluation experiments to realize a vertically through-type module structure for the electrical interconnection of vertically stacked chips. Specifically, we have developed technologies for creating in-board coaxial structures using through-silicon vias (TSVs), for fabricating micro indium solder bumps for inter-board connections, for fabricating superconducting electrodes, and for flip-chip bonding for stacking. Furthermore, we have fabricated a magnetic shield to house the vertically through-type packaging module composed of stacked chips, and have established a cryogenic system and an electrical characterization environment for evaluating electrical characteristics at ultra-low temperatures. We designed and prototyped a stacked superconducting qubit structure containing qubits, confirmed qubit resonance, and successfully performed vertical readout using a readout resonator. We have demonstrated that qubits operate on the through-type packaging structure.
② Development of the testbed dilution refrigerator
Based on experimental data collected to date, we have developed simulation technology capable of accurately reproducing the performance of dilution refrigerators. We built a prototype incorporating this simulation technology into its design and successfully achieved a performance of 1.6 mW, exceeding our target of 1.5 mW. Furthermore, we successfully demonstrated its functionality as a quantum computer using a testbed unit installed at the University of Osaka, contributing to the successful exhibition of a purely domestically produced quantum computer at the Expo 2025 Osaka, Kansai. Additionally, through continuous operation of this actual quantum computer, we were able to identify challenges related to long-term stable operation and establish solutions to address them.
3. Future Directions
Regarding the stacked superconducting qubit structure, we successfully confirmed qubit resonance and conducted vertical readout experiments, thereby demonstrating that qubits operate within the stacked structure. By evaluating the energy relaxation times of the qubits, we have identified challenges specific to the stacked structure and measurement constraints, which will inform research and development into qubit design and control technologies for fault-tolerant quantum computing.
Regarding dilution refrigerators, we will further advance the technologies developed for the 1.5 mW system and the testbed system, and we will promote research and development with the aim of establishing the technology required for a cooling system capable of realizing a fault-tolerant superconducting quantum computer.