The Design and Evaluation Methodology of Dependable VLSI for Tamper Resistance

Research Project Outline

The smart cards, which keep money and personal information in their LSIs, are widespread in the social system. The dependability and security assurance of these LSI are critical issues. The attacker reveal secret information by analyzing the side-channel information such as power consumption and electro-magnetic field. Furthermore, the attacker could clone security LSIs by analyzing physical information. The purpose of this research is the design and evaluation methodology of dependable VLSI against these tamper attacks.

Research Director
TakeshiFujino
Affiliation
Professor, Ritsumeikan University
Research Started
2009
Status
ongoing
Research Area
Fundamental Technologies for Dependable VLSI System
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