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Presented slides on the 2nd JST International Symposium on Dependable VLSI Systems 2013 have been released. ...Program
Opening remarks by the research supervisor
| "Title"- Name- Affiliation |
download |
「Opening remarkas on the 2nd JST International Symposium on Dependable VLSI Systems 2013」
Research Supervisor Dr. Shojiro Asai
Rigaku Corporation Vice President |
→PDF 301kB |
Slides of the invited presentor (the order of presentation)
| "Title"- Name- Affiliation |
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"Challenges at Circuits Designs for Nonvolatile Memory and Logics in Dependable Systems"
Dr. Meng-Fan (Marvin) Chang
National Tsing Hua University |
→PDF 3,687kB |
"Heterogeneous Networks for Dependable Wireless Access and the 1000x Capacity Challenge"
Dr. Valentin Gheorghiu
Qualcomm Standards and Industry Organizations |
→PDF 2,214kB |
"Dynamic Adaptation for Resilient Integrated Circuits and Systems"
Prof. Krishnendu Chakrabarty
Duke University |
→PDF 4,235kB |
"Cross-layer Approaches for Resilient System Design"
Prof. Mehdi B. Tahoori
Karlsruhe Institute of Technology |
→PDF 3,920kB |
"Deterministic Ethernet as Reliable Communication Infrastructure for Distributed Dependable VLSI Systems"
Dr. Wilfried Steiner
TTTech Computertechnik AG |
→PDF 1,998kB |
"Putting Trust in Automotive Electronics"
Dr. Camille Vuillaume
ETAS K.K. |
→PDF 2,527kB |
"Real Systems Are Usually Not Perfect, So Why Design Assuming They Are"
Dr. Roger Barth
Micron Technology |
→PDF 1,269kB |
Slides of the team's introduction (the order of presentation)
| "Title"- Name- Affiliation |
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"Development of Dependable Wireless System and Device"
Prof. Kazuo Tsubouchi
Tohoku University |
→PDF 858kB |
"Dependable Wireless Solid-State Drive (SSD)"
Prof. Ken Takeuchi
Chuo University |
→PDF 1,943kB |
"Three-Dimensional VLSI Systems with Self-Restoration Function"
Prof. Mitsumasa Koyanagi
Tohoku University |
→PDF 2,596kB |
"Dependable SRAM Techniques for Highly Reliable VLSI Systems"
Prof. Masahiko Yoshimoto
Kobe University |
→PDF 2,384kB |
"DART: Dependable Architecture with Reliability Testing"
Prof. Seiji Kajihara
Kyushu Institute of Technology |
→PDF 1,408kB |
"Soft-error and Variability Resilience in Dependable VLSI Platform"
Prof. Hidetoshi Onodera
Kyoto University |
→PDF 1,628kB |
"SRAM Soft Error Rate Estimation Tool with Nuclear Reaction Simulator"
Associate Prof. Hiroshi Kawaguchi
Kobe University |
→PDF 5,103kB |
"Development of Dependable Network-on-Chip Platform"
Prof. Tomohiro Yoneda
The National Institute of Informatics |
→PDF 1,811kB |
"Fundamental Technology on Dependable SoC and SiP for Embedded Real-time Systems"
Associate Prof. Nobuyuki Yamasaki
Keio University |
→PDF 3,601kB |
"The Design and Evaluation Methodology of Dependable VLSI for Tamper Resistance"
Prof. Takeshi Fujino
Ritsumeikan University |
→PDF 2,936kB |
"FOF (Functionally Observable Fault): A unified mode for testing and debugging - ATPG and application to debugging -"
Prof. Masahiro Fujita
University of Tokyo |
→PDF 913kB |
Contact
Japan Science and Technology Agency (JST)
K's Gobancho, 7, Gobancho, Chiyoda-ku, Tokyo, 102-0076 Japan
TEL: :03-6261-0585, FAX: 03-3222-2064
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