Outline of R&D
Development of a Scalable, Highly Integrated Quantum Error Correction System
1. Position in the program
The current quantum computer is called NISQ with error-correction capability. A qubit controller placed at room temperature controls the superconducting qubits. This controller consists of discrete components and its size is 9-unit to control 16 qubits. The fault-tolerant general-purpose quantum computer (FTQC), which is the goal of Moonshot 6, is required to control large qubits, and to realize this goal. It is necessary to establish an error correction process and reduce the controller to a practical size and weight.
In the error correction process, the signals from the qubit-controller must be error-corrected and be output in a short time. In addition, in order to reduce the size and weight of the qubit controller, it must be modularized and placed in the cryogenic region near the qubit. To achieve these goals, it is essential to develop dedicated SoCs and optical integrated circuits that can be placed in cryogenic environments, utilizing classical electronics with integrated circuits (LSI).
In this project, we are first developing and verifying the realization of these essential technologies using the superconducting qubits. Furthermore, they can be utilized to control other qubit methods (ion trapping, silicon spin, etc.) in future. We plan to work on them in collaboration with related projects.
Keyword: Syndrome analysis algorithm, reliability, optical-Cryo interface, scalability, Cryo CMOS
2. Overview of the R&D and the Challenges
In this project, we are working on the layers above the qubits (frontend and backend systems) using classical electronics in order to correct errors on a large number of physical qubits in real time and with low power consumption, targeting an FTQC with an error correction function modeled after RIKEN's superconducting quantum computer.
Backend (R&D items 1,4)
The backend for error correction provides low latency and wide bandwidth error correction processing for error syndrome information sent from the frontend. In addition, by developing parallel algorithms and dedicated hardware using FPGAs, the backend system can meet the time requirements of the frontend.
Frontend Department (R&D items 2-5)
For the frontend that controls qubits, we aim to reduce the size and power consumption of the controller by designing and developing an SoC dedicated to qubit control that can operate stably in cryogenic regions. In addition, the number of wires will be reduced by using an optical interface to link many qubits to reduce the size and power consumption of the frontend part.
Systematization (challenging issues)
A number of qubits that can be placed in a single refrigerator are stored, and error correction is used to generate logical Qubits. We also aim to create a highly integrated system by connecting several chillers in a scalable network.
3. Future plans
2025: Realization of FTQC prototype
2030: Validation of scalable FTQC model
