Summary of the project

This project aims to realize a photonic‑interconnected, fault‑tolerant quantum computer based on ion‑trap technology. By 2030, we will build a 100‑qubit system, demonstrate quantum error correction and logical operations, and establish key technologies such as the universal unit cell (UUC) scalable beyond 1,000 qubits and multiplexed photonic interconnects. Building on these advances, by 2050we target a million‑qubit‑class quantum supercomputer composed of multiple linked QPUs, creating a transformative computational platform for materials discovery, drug development, and energy optimization.

Milestone by year 2030

By 2030, this project aims to establish the technological foundation for fault‑tolerant quantum computing. We will construct and stably operate a 100‑qubit ion‑trap quantum computer, demonstrating quantum error correction and logical gate operations. In parallel, we will develop key component technologies scalable beyond 1,000 qubits, including a quantum CCD, photonic interfaces based on micro‑photonic cavities, high‑fidelity near‑field gates, integrated photonic circuits, and multi‑site fluorescence detection. These technologies will be consolidated into a Universal Unit Cell (UUC) for demonstration (Fig.1), and we will achieve remote entanglement via multiplexed photonic interconnects. Through these efforts, the project seeks to establish Japan’s global leadership in scalable quantum architectures.

Fig.1 Schematic of the Universal Unit Cell (UUC)

Milestone by year 2028

We will establish the core technologies required for fault‑tolerant quantum computing. By building and operating a first 100‑qubit prototype, we will demonstrate the full quantum error‑correction cycle, from encoding to decoding (Fig.2). In parallel, we will develop advanced devices essential for future 1,000‑qubit‑scale systems, including ion–photon entanglement using micro‑cavities, 3D integrated photonic circuits, 3D traps for RF near‑field gates, and multi‑site fluorescence detection. We will also advance foundational technologies for scalability—high‑speed shuttling via a quantum CCD, multi‑channel photonic feedthroughs, and sympathetic cooling—thereby establishing the technical basis for large‑scale QPU integration beyond 2030.

Fig.2 Ion‑trap Quantum Computer (First Prototype)
(Courtesy of the University of Mainz)

Performers

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