ULP-HPC: Ultra Low-Power, High-Performance Computing via Modeling and Optimization of Next Generation HPC Technologies

Research Project Outline

The importance of High-Performance Computing (HPC) is now widely recognized; however, the rapid increase in power consumption beyond tradeoff for performance is regarded as critical. We aim to improve the power/energy vs. performance efficiency of HPC by 1000-fold in the next 10 years; our proposal, ULP-HPC (Ultra Low-Power HPC) will (1) apply autonomous performance tuning of system parameters based on sound mathematical foundations for power-performance optimization onto (2) new reed of HPC platforms including many-cores, vector accelerators, next-generation memory systems, etc., and (3) construct testbeds for verifying our approach including the utilization of TSUBAME, the No.1 supercomputer in Japan at Tokyo Tech., and furthermore (4) aim at optimizing HPC applications and their algorithms themselves for low power. The result will allow "shrinking" of current- day massive TSUBAME onto a desktop size, greatly contributing towards advancement of science and technology.

Research Director
Professor, Tokyo Institute of Technology
Research Started
Research Area
Technology Innovation and Integration for Information Systems with Ultra Low Power
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