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Research Director

Tadahiro Kuroda

(Professor, Faculty of Science and Technology, Keio University)

Tadahiro Kuroda received the Ph.D. degree in electrical engineering from the University of Tokyo. In 1982, he joined Toshiba Corporation. From 1988 to 1990, he was a Visiting Scholar with the University of California, Berkeley. In 2000, he moved to Keio University, where he has been a professor since 2002. He was a Visiting MacKay Professor at the UC Berkeley in 2007. He published more than 200 papers, including 37 ISSCC papers, 26 VLSI Symposia papers, 19 CICC papers and 16 A-SSCC papers. He wrote 22 books/chapters and >150 patents registered. He was an elected AdCom member, a Distinguished Lecturer, and a representative of Region 10 for the IEEE Solid-State Circuits Society. He is an IEEE Fellow and an IEICE Fellow. He is an executive committee chair for VLSI Symposia and A-SSCC.

URL：http://www.kuroda.elec.keio.ac.jp/accel_kuroda/en/

Program Manager

Seiichiro Kawamura

(ACCEL Program Manager, Japan Science and Technology Agency)

Dr. Seiichiro KAWAMURA is Fellow/ Program Manager (PM) at JST.
Previously, he had been engaged in developing advanced semiconductor technologies as the Director at Fujitsu until 2001. In April 2001, he moved to the post of Executive Director of Advanced Semiconductor Research Center at AIST to oversee the MIRAI Project as a Sub Project-Leader. He received the B.S. degree in Applied Physics from the University of Tokyo, the M.S. degree in Solid State Physics from Princeton University, and the Ph.D degree in Electronic Engineering from Tohoku University.　Dr. Kawamura has served on the Technical Program Committees of several international conferences, and was the Program Chair and the General Chair of the Symposium on VLSI Technology in 1997 and 2003, respectively.
Dr. Kawamura has been IEEE EDL (Electron Device Letters) Editor from 1999 to 2010.

Outline of R&D Project

Two proprietary technologies were developed in CREST, a wireless link of chips using inductive coupling, namely ThruChip Interface (TCI), and a contactless connector using electromagnetic coupling, namely Transmission Line Coupler (TLC). Reduction of data communication power to 1/1000 and wireless connection of modules were achieved.
In this project, SoC and memory chips are stacked for 3D integration by TCI, and peripheral modules such as storage and sensors are connected to a computer by TLC. Low power and high performance information processing system and its application will be studied.