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International Symposium on Technology Innovation and Integration
for
Information Systems with Ultra-Low-Power (JST-CREST)
Title |
Summary |
Presentation |
Development of Ultra-low-power FPGA with Fine-Grained Field-Programmable Threshold Voltage Control
Hanpei Koike --- Electroinformatics Group Leader, National Institute of Advanced Industrial Science and Technology (AIST)
|
doc1-1 |
doc1-2 |
Low-power, High-performance,
Reconfigurable Processor Using Single Flux Quantum Circuits
Naofumi Takagi --- Professor, Kyoto University
|
doc2-1 |
doc2-1 |
Research on Ultra Low Power SoC for Media Processing
Satoshi Goto --- Professor, Waseda University
|
doc3-1 |
doc3-2 |
Innovative Power Control for Ultra Low- Power and High-Performance System LSIs
Hiroshi Nakamura --- Professor, The University of Tokyo
|
doc4-1 |
doc4-2 |
Ultra-Low-Power Data-Driven Networking System
Hiroaki Nishikawa --- Professor, University of Tsukuba
|
doc5-1 |
doc5-2 |
Optimum Control of Electrical Power in IT Systems by ULP Networked Sensing Systems
Ryutaro Maeda --- Director, National Institute of Advanced Industrial Science and Technology (AIST)
|
doc6-1 |
doc6-2 |
ULP-HPC: Ultra Low-Power, High-Performance Computing via Modeling and Optimization of Next Generation HPC Technologies
Satoshi Matsuoka --- Professor, Tokyo Institute of Technology
|
doc7-1 |
doc7-2 |
Strategic Integration of Ultra-Low Power Technologies
Haruhisa Ichikawa --- Professor, The University of Electro-Communications |
doc8-1 |
doc8-2 |
|
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